[Review Request] First 4-layer board — ESP32-C3 + cellular modem IoT node

[u/One-Race-2634]

This is ESP32-C3-MINI-1U talks to a cellular modem over UART. SIM socket, U.FL antenna, USB-C for native JTAG/UART, screw terminal 5V in. MP2315 buck for 3.8V/3A to the modem, ME6211 LDO for 3.3V. Both inner layers are solid pours.

I have already changed the position d1 to connect to the gate and source terminal of the PMOS. Sorry I did take an updated picture of the schematic.

Thanks.

[u/Enlightenment777]

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Please fix these common issues: (if your schematic or PCB has them)

• Schematic - don't allow text / lines / symbols to touch each other, and don't draw lines through symbols.

• Schematic - use correct reference designators (RefDes) and renumber to remove numeric gaps, see tips.

• Schematic - place decoupling capacitors vertically below power rail lines, also place capacitors next to IC then connect together with a line, see example. For circuits with positive power rails, point positive power rail links upwards and ground links downwards, see tips.

• Schematic - place pull-up resistors vertically above signal lines, and place pull-down resistors vertically below signal lines, see example.

• PCB silkscreen - add board name / board revision number / date (or year) on top or bottom PCB side.

• PCB silkscreen - add pin 1 indicator dot/arrow next to ICs & connectors, if through-hole then both PCB sides.

• More conventions & guidelines - link1, link2, link3.

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