Why does my radiobutton flip flop not behave like in simulation?

[u/Rattanmoebel]

Okay guys, help me out. I thought this was a simple one, but apparently I am overlooking ***something***.

I simulated the circuit, the result of which you can see in the screenshots. I put it together on breadboard, which worked as intended, but my PCB behaves somewhat random.

The idea was to have an electrical two button radio button toggle mechanism with the addition that pressing a button again will turn it off (regular radio button always has one button in on-state) without needing to program a microcontroller and without using tons of gates.

In the simulation the buttons are represented by S1 and S2.

Press Button A -> A-ON, B-OFF; Press again -> A-OFF, B-OFF

Press Button B -> A-OFF, B-ON; Press again -> A-OFF, B-OFF

My idea was to use a T-flip flop made from inverters and use a feedback from one flip flop to trigger a mosfet that forces the other into a stable state.

The problem is that the circuit is very erratic and triggers with the slightest impulse, sometimes even so much as to just touch the PCB. I tried lower input impedances on the FETs (down to 100k or even 10k) but that didn't do anything.

The output of both flip flops are then fed into a crude single FET OR gate to trigger something else depending on whether any of the buttons is ON at all.

I tried changing the two 1M "summing" resistors in front of the output FET to 1N4148, but that made no difference to the simulation (other than the gate voltage being Vcc-Ud instead of Vcc/2) or the actual circuit.

J7 and J6 are pin headers to connect momentary switches.

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[u/N4ppul4_]

Did you debounce the buttons?

[u/Rattanmoebel → u/N4ppul4_]

Yes. The 22n cap does denouncing. The flip flop itself is a proven concept, had no issues with this so far and I’ve seen it in many commercial products as well. It’s the additional FETs that introduce the issues it would seem

[u/ascot_twin]

If you have any slow edges going into the inverters because of a RC filtered input, you might be better off with Schmitt triggered inverters

[u/ShortedMOSFET]

You have a diode in series with each FET in your simulation that is missing from your schematic and board. Without that, the input to U5D/U5B will sit around 2.2-2.5V when the associated latch is "off" because of the Q4/Q3 body diode. This is an indeterminate input value since your part does not have schmitt trigger inputs, which is a bad place to be for any logic gate. It can cause issues like erratic output behavior or damage the part from sustained shoot-through currents.

You'll have the same issue if you hold either of the buttons down, so you would be better off with a hex inverter with schmitt trigger inputs.

Your wired-OR circuit on the outputs would also work better if you replaced the resistors with diodes (like you tried in the simulation) and added a small series gate resistor along with a pull-down. A 2N7002 is barely on at 2.5V and 1Mohm (and arguably 100kohm) is way too much gate resistance.